Utilizing a memory protection unit (MPU) or a memory management unit is well-known for controlling memory access in data processing systems. It takes time for the MPU or the memory management logic to determine the target memory address. Specifically, it takes several processing cycles before data corresponding to the target memory address can be located as being stored in a particular one of the plurality of memories and thus be accessed. The data access time can become a time critical path that limits the performance of the data processing system. In addition, power consumption is another critical path if more than one of the plurality of memories is accessed.
Therefore, a high performance and low power consumption method is needed for accessing memories and fetching data. Accordingly, a data processing apparatus to improve the efficiency and performance of data access and to reduce the circuit area in the device is also needed.